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The total ionizing dose (TID) response of 65-nm CMOS transistors is studied by 10-keV x-ray and 3-MeV protons up to 1 Grad (SiO2) total dose. The degradation levels induced by the two radiation sources are different to some extent. The main reason is the interface dose enhancement due to the thin gate oxide and the low energy photons. The holes’ recombination also contributes to the difference. Compared to these two mechanisms, the influence of the dose rate is negligible.
For the electronics implemented in space or other radiation-related applications, it is mandatory for irradiation experiments to be performed under laboratory environments, such as Co-60 γ ray, 10-keV x-ray, low energy protons, low energy electrons, etc. One problem is that even with exposure to the same dose levels, the radiation damage in electronics induced by different radiation sources can be different to a great extent. The corresponding difference in CMOS technologies has been studied since the early 90 s.[1,2] The physical mechanisms were attributed to different fractional yields of the holes escaping the initial recombination,[1,3] different interface dose enhancement factors,[4] different track sizes,[5] different dose rates,[6] or not fully understood.[7]
One thing worth noting is that these studies correspond to thick gate oxide (> 30 nm), where the physical processes of total ionizing dose (TID) can be divided into several independent processes, including the generation of electron/hole pairs, the transport of holes towards the Si/SiO2 interface, the trapping of holes near the interface, and the accumulation of interface traps. Along with the scaling of CMOS technology, the charge trapping efficiency drops rapidly as the gate oxide is thinned to 5 nm and beyond, and these processes begin to interfere with each other. For state-of-the-art electronics, although there are some studies focusing on the radiation damage induced by different radiation sources, the research objects are mainly nonvolatile memories or analog electronics.[8–10] Few studies have been done on state-of-the-art CMOS technologies.
For common space applications, the TID requirements for electronics are covered by several hundreds of kilorads. However, for the new Jovian missions, the hardening level of several megarads are mandatory to ensure the safe operation of the electronic systems. Besides the space applications, for the electronics implemented in the high-energy physics (HEP) environments, like in the LHC after upgrade (Super-LHC, SLHC), the target of radiation hardness has increased up to 1 Grad (SiO2), which is the estimated deposited dose in 10 years of use.[11,12] In this work, we focus on the degradation of 65-nm CMOS technology irradiated up to 1 Grad (SiO2) by 10-keV x-ray and 3-MeV protons. We aim to compare the dependence on radiation sources, concerning the vulnerability evaluation of a strong candidate for the LHC upgrade. The devices under investigation include thin-oxide core transistors (2.5 nm) and thick-oxide I/O transistors (5 nm), which help us explore the difference due to the technology scaling at the same time.
The devices used in this study were bulk MOSFETs designed by CERN and fabricated in a commercially available 65-nm CMOS technology. For the I/O nMOS and pMOS transistors, the gate oxide is about 5 nm thick and the supply voltage is 2.5 V. For the core transistors, the gate oxide is about 2.5 nm thick and the supply voltage is 1.2 V. All the transistors feature the conventional open layout design.
After the wire bonding at INFN, Padova, we irradiated the transistors at room temperature using two radiation sources at the INFN-Laboratori Nazionali di Legnaro, Padova. The first one is 10-keV x-ray source with a dose rate of 1 krad·s−1 (SiO2). Here we need almost 2 weeks to reach a 1 Grad (SiO2) cumulative dose. The dose rate was measured by a square silicon diode calibrated in accordance to the ASTM recommendations, with an active area of A = 5 × 5 mm2 and thickness d = 300 μm, positioned on the chuck of a commercial semiautomatic probe station under the x-ray tube. During the x-ray dose rate measurements, the diode was reverse biased at full depletion and the active area was grounded, and the guard-ring contact was used to prevent border effects on the radiation-induced transient current.
The other one is the proton beam with a kinetic energy of 3 MeV and a maximum proton current of 1 μA. Before irradiation, the beam uniformity was checked by a Gafchromic radiology film which was exposed to the beam for a few seconds. Then the beam was carefully aligned to make sure that the sample could be placed in the uniform beam region. The beam intensity was measured with a Faraday cup before and after each exposure. During irradiation, the relative fluence was continuously monitored and adjusted by the current on the sample. A flux of 4 × 1010 p/(cm2·s) was used up to 7 × 1013 p/cm2. Here the dose rate was about 54 krad·s−1 (SiO2). Then a higher flux of 4 × 1011 p/(cm2·s) was used till 7 × 1014 p/cm2 (950 Mrad (SiO2)). Here the dose rate was about 540 krad·s−1 (SiO2).
During irradiation, devices were de-lidded to make sure that the photons and protons can enter into the oxide region. The terminals of gate, drain, source, and n-well were connected together for pMOSFETs, whereas the gate contact was biased at the supply voltage for nMOSFETs, taking it as the “worst case” described in Ref. [13]. The irradiation was periodically interrupted to measure the transfer and output characteristics by using an HP4156 parameter analyzer.
To quantitatively compare the radiation damage induced by the two radiation sources, statistics of the parameters were analyzed first. Figure
Figure
Consistent phenomena were also observed for core nMOSFETs featuring other geometries. Although the trends of the degradations were similar, from Fig.
To quantitatively compare the difference in radiation degradation induced by the two sources, figure
Figure
To understand the origins of the degradation difference above, the differences from the two irradiation setups have to be considered. The factors possibly responsible for the degradation difference could be the interface dose enhancement, the fractional yield of holes, and the dose rate, which will be analyzed one by one.
Firstly, the interface dose enhancement effect is particular for low-energy source. From Fig.
Assuming that the degradation difference was only due to the interface dose enhancement effect, figure
Secondly, the fractional yield of holes (or charge yield) is defined as the fraction of holes escaping the columnar or geminate recombination. There are experimentally measured values summarized in Refs. [1] and [3] for a number of particles. However, these studies were performed on MOS capacitors with very thick gate oxide (> 100 nm), the preciseness of these values becomes questionable for modern CMOS technologies, due to the small shifts in parameters. In fact, results of floating gate cells with 10-nm tunneling oxide show similar degradation under Co-60 gamma ray and 27 MeV protons irradiation even though the charge yield values published before were quite different.[3,14] To provide more information, figure
Under this circumstance, we further consider the contribution of the fractional yield of holes. For the nMOSFETs, the bias during irradiation guarantees that the electric field in the gate oxide is large (about 5 MV/cm) to enhance the charge trapping. For the pMOSFETs, all the terminals were connected together during irradiation, so the electric field in the gate oxide was much smaller than that of the nMOSFETs. Based on the mechanism of the interface dose enhancement effect, it is irrelevant with the electric field. However, the fractional yield of holes is strongly dependent on the electric field in the oxide and increases with the value closely. Referring to Ref. [3], when the electric field is small, the yield differences between different sources are limited, and the yield differences cannot be ignored at high electric field (the yield for x-ray is stronger than that for 3 MeV protons).
Table
Thirdly, the adopted dose rates corresponding to the two sources are 1 krad·s−1 (SiO2) for x-ray, 54 krad·s−1 (SiO2) and 540 krad·s−1 (SiO2) for protons. From the conclusion in Ref. [15], at high dose rates, radiation-induced charge buildup in gate oxide is inclined to be suppressed. Considering that all the adopted dose rates are comparatively high, and the results in Fig.
The TID effects induced by 10-keV x-ray and 3-MeV protons were studied in 65-nm CMOS transistors to irradiation up to 1 Grad (SiO2). The degradation levels induced by the two radiation sources were different to some extent. Among all these transistors, core nMOSFETs and pMOSFETs showed the strongest differences where the x-ray-induced degradation was stronger. The degradation difference was also evident in the I/O nMOSFETs. For the I/O pMOSFETs, x-ray and protons almost induced the same level of degradation.
After taking the different radiation setups into account, three possible factors including the interface dose enhancement effect, the fractional yield of holes, and the dose rates are discussed in detail. The main reason for the degradation differences is the dose enhancement due to the thin gate oxide and the low energy photons. The holes’ recombination also contributes to the difference. Compared to these two mechanisms, the influence of the dose rate is negligible.
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